Integrated circuits (“ICs”) are incorporated into many electronic devices. IC packaging has evolved, such that multiple ICs may be vertically stacked in so-called three-dimensional (“3D”) packages in order to save horizontal area on a printed circuit board (“PCB”). An alternative packaging technique, referred to as a 2.5D package may use an interposer, which may be formed from a semiconductor material such as silicon, for coupling one or more dies to a substrate. Pluralities of IC chips, which may be of heterogeneous technologies, are mounted on the interposer. Connections among the various ICs are routed through conductive patterns in the interposer. These interposer and stacked IC techniques are called 2.5D-IC and 3D-IC, respectively.
The increased level of integration and packing density associated with stacked IC designs results in potential thermal and power delivery problems. For example, localized overheating may occur in a chip or cross chip when the stacked IC design is operated under a certain power level. The thermal and power problems decrease the reliability of integrated circuits, and eventually may cause degradation or failure of a semiconductor device. So the thermal and power management becomes very important in stacked ICs such as 3D-IC, including the package over the stacked ICs, when the interconnect width decreases to hundreds or tens of nanometers.